Design with VHDL
| Structure Type: | Study unit |
|---|---|
| Code: | IITS2301 |
| Type: | Optional obligatory / Professional Studies |
| Curriculum: | TT 2014 |
| Level: | Bachelor of Engineering |
| Year of Study: | 3 (2016-2017) |
| Credits: | 3 cr |
| Responsible Teacher: | Mäkinen, Seppo |
Courses During the Academic Year 2016-2017
| Impl. | Group(s) | Study Time | Teacher(s) | Language | Enrolment |
|---|---|---|---|---|---|
| 4 | I-IT-4N, I-TT-4N | 2016-09-01 – 2016-10-31 | Santiago Chavez Vega | English | 2016-08-22 – 2016-09-19 |
| 5 | I-IT-3N, I-TT-3N | 2017-03-06 – 2017-03-05 | Santiago Chavez Vega | English | 2016-12-12 – 2017-01-16 |